Recently, in semiconductor integrated circuits, their integration degree becomes significantly improved, and for obtaining an integrated circuit having high performance, high reliability, and high yield, it has been required that both mechanical precision and electrical characteristic are more excellent. Along with this, with respect to quality of a silicon wafer used for producing a device of semiconductor integrated circuit and so forth, stricter conditions have been imposed and it has been required to produce a silicon wafer of more excellent crystal quality. Moreover, by worldwide extension and demand enlargement of semiconductor integrated circuit, silicon wafers of high quality have lead to being required in large quantity and stably, in varied ways.
For a method for obtaining a silicon wafer from polycrystalline material of semiconductor such as silicon, there is Czochralski method (hereinafter, abbreviated as CZ method) in which a polycrystalline material is once melted in a crucible and a seed crystal is pulled from a raw material melt and thereby a silicon single crystal is obtained. The silicon single crystal grown by the CZ method is sliced and subjected to lapping, chamfering, polishing, and so forth and thereby, a silicon wafer is produced. Such a method for improving quality of a silicon wafer includes a method for reducing density and size of Grown-in defects caused by single crystal growth that degrade an oxide dielectric breakdown voltage characteristic or a device characteristic. First, formation of the Grown-in defects will be explained.
In the point defects causing Grown-in defects due to single crystal growth, there are Vacancy that is a point defect of atomic vacancy type and Interstitial that is a point defect of interstitial silicon type. The saturation concentration of the point defects is a function of temperature, and becomes in a state of supersaturation along with lowering of temperature in the single crystal growth. In the state of the supersaturation, pair annihilation, outward diffusion or gradient diffusion, and so forth are caused and thereby, the state proceeds to relax the supersaturation state. As a result, one of Vacancy or Interstitial comes to remain as point defects of dominant supersaturation. It is known that if a ratio V/G of a pulling rate V in growing a straight body of the single crystal and a crystal temperature gradient G along a pulling axis direction near the solid-liquid interface is large, the state is prone to be in an excessive state of Vacancy, and on the other hand, if V/G is small, the state is prone to be in an excessive state of Interstitial. If the excessive concentration becomes a certain degree or more, these point defects become agglomerated and form Grown-in defects that are secondary defects of the point defects in the growth of the single crystal. It is known that in the case that Vacancy is dominant, the Grown-in defects that are the secondary defects include void defects observed as COPs or FPDs or the like and defects observed as OSFs after oxidation treatment and degrade oxide film characteristics. On the other hand, in the case that Interstitial is dominant, Grown-in defects that are the secondary defects observed as dislocation loops or the like become formed and come to cause serious failure such as leakage.
A technology for controlling the Grown-in defects not to be generated includes a technology for producing defect-free crystal that has been disclosed in Japanese Patent Application Laid-open (Kokai) No. 8-330316, Japanese Patent Application Laid-open (Kokai) No. 11-79889, and so forth. In order to reduce the excessive concentration of point defects as much as possible, a ratio V/G of a pulling rate V in growing a straight body of the single crystal and a crystal temperature gradient G along a pulling axis direction near the solid-liquid interface is controlled to be in a very limited range. Therefore, the range of the pulling rate V is limited to be in a very narrow range and therefore, actually, defectives are frequently generated and yield and productivity are greatly degraded. Accordingly, in Japanese Patent Application Laid-open (Kokai) No. 11-147786, there has been provided a technology for improving the control width in CZ method to be large, producing a silicon single crystal under a growth condition that is easy to be controlled, and therewith reducing the crystal defects.
However, according to such technologies, in the case of continuously producing many silicon single crystals by a small number of apparatuses for producing a single crystal, variation is caused in quality of the silicon single crystal to be grown in the same condition and therefore, it is difficult to satisfy, as a low cost, the current demand of wafer products that silicon wafers of high quality are required in a large quantity and stably. The cause that such variation of qualities of silicon single crystals is generated is as follows.
The crystal temperature gradient G along a pulling axis direction near the solid-liquid interface of a single crystal is determined a thermal environment composed of heater, heat shield, and so forth (HZ: Hot zone) introduced in the apparatus for producing a single crystal. However, along with time elapse, the silicon oxide formed by reacting the silicon that is raw material and oxygen generated from the quartz crucible come to adhere to a low-temperature part such as a chamber of the apparatus for producing a single crystal. The chamber part is a part of absorbing a radiant heat and, if the part is covered with an oxide, thermal absorbing ability is prone to be reduced and G becomes small. Therefore, if G lowering is caused along with time elapse, V/G increases and consequently the sizes of Grown-in defects increase, and the variation are caused in quality of the silicon single crystal to be pulled.
Accordingly, in Japanese Patent Application Laid-open (Kokai) No. 2003-327494, there has been provided a technology in which an average value of the heater power consumed in production of necking portion of the single crystal is calculated, and based on the value, the pulling rate V in pulling the straight body of the single crystal is modified and thereby, individual difference between apparatus or time-oriented mobilizing factor caused by degradation of the heater and such in the respective batches of the silicon single crystals to be produced is dealt with. However, because G gradually becomes small during the single crystal growth, in the case of producing silicon single crystals of desired quality in a large quantity and stably, it is not sufficient only to modify the pulling rate V in the straight body in a single uniform way by a fixed amount under the average value of the heater power consumed in the production of the necking portion of the single crystal.
Moreover, obtaining defect-free wafers of high quality by the control only in the step of single crystal growth is difficult and at a very high cost as described above and therefore, occasionally, the growth of the single crystal is performed under a low-cost condition in which the growth of the single crystal is easy to be controlled, and the wafers sliced from the silicon single crystal are subjected to high-temperature heat treatment and so forth and, defects near the wafer surface are controlled to be annihilated or to have a desired defect density. The wafer to which such a characteristic is most applied is a wafer having a surface defect-free layer (Denuded Zone, DZ) and its superiority has been almost proved.
The wafers in which a silicon wafer sliced from a silicon single crystal is treated and thereby its surface vicinity is made to be defect-free include (a) annealed wafer in which a silicon wafer is heat-treated at a high temperature and thereby a defect-free layer is formed in the surface layer (Japanese Patent Application Laid-open (Kokai) No. 2002-184779), and (b) epitaxial wafer in which a silicon wafer is used as a substrate and thereon a defect-free layer is epitaxially grown. In general, a silicon wafer used for them, Grown-in defects formed in the crystal growth exist. Among them, the epitaxial wafer is at a high cost and therefore, annealed wafer is dominant in the aspect of production cost. However, it is very important for characteristics of a wafer for annealing that sizes of Grown-in defects are small and Grown-in defects are in a state of being easy to be annihilated so that defects near the surface layer are easily annihilated or easily controlled to have a desired defect density by heat treatment. Therefore, it is necessary that V/G is set to be small to some extent in a stage of the single crystal growth and that the variation of V/G is controlled to be small.
That is, as described above, it has been indicated that the type of point defects finally becoming dominant is changed by V/G and that the type is Vacancy when V/G is large and the type is Interstitial when small. However, in the region of Vacancy, as the value of V/G is smaller, the concentration of Vacancies that are finally introduced becomes smaller. When the concentration of the introduced Vacancies is small, the sizes of Grown-in defects formed by agglomerating them become small. However, the direction that V/G becomes smaller is also the direction that the pulling rate V in pulling the straight body of the single crystal becomes small and therefore, generally is the direction that the cost becomes high. Accordingly, using the maximum V/G for being capable of annihilating defects by the heat treatment performed after producing the wafer becomes the key for suppressing the cost. This value depends on the condition of the heat treatment.
Moreover, it is known that also by doping nitrogen in the growth of the single crystal, the sizes of Grown-in defects can be small, and in the wafer for annealing, occasionally, nitrogen is doped in the single crystal growth. Furthermore, in performing annealing, Bulk Micro Defects (hereinafter, abbreviated as BMD) are formed inside the wafer at the same time of annihilating the surface defects or of controlling the surface defects to have desired density and thereby, the wafer can be provided with a capability of capturing heavy metal contaminants in the device process (gettering capability).
It is known that also in forming the BMDs, the BMDs are more easily formed in the nitrogen doping. Therefore, nitrogen doping in the crystal grown for slicing the wafer for annealing therefrom has two merits that Grown-in defects are made to be small and that BMDs are made to be easy to be formed (Japanese Patent Application Laid-open (Kokai) No. 2002-353225). However, in the growth of the silicon single crystal for the annealed wafer doped with nitrogen, the nitrogen concentration is determined by its segregation and therefore, the nitrogen concentration in the crystal axis direction is different. Furthermore, because the influence on the formation of Grown-in defects is different according to the difference of G even in the same nitrogen concentration, it is very difficult to obtain the wafers of uniform quality doped with nitrogen in a large quantity and stably.
A method in which the concentration of the doped nitrogen or the fluctuation of resistance by the segregation of a dopant such as phosphorus or boron for controlling the resistance is suppressed to be in a constant range and thereby the single crystal ingots of the same quality are obtained in a large quantity by CZ method includes multi-pulling method. Here, a multi-pulling method is a method of, pulling a single crystal, then additionally charging polycrystalline raw material in the residual silicon melt without turning off power of the heater, pulling a next single crystal, and repeating the steps and thereby pulling a plurality of single crystals (International Publication No. WO 02/014587). Thereby, many crystal ingots of the same quality can be pulled in the quite same condition in one batch and uniform crystals can be obtained in a large quantity and therefore, it is thought that the multi-pulling method has a utility value for overcoming the above-described difficulty.